Creating makefiles

[kenshi]

Hello. It's me again. I've been trying to make a make file to compile all my source files at once. Needless to say, it's not working. The problem is in getting the linker to include files I specify with #include. Here's what I have for a makefile so far:

]code]
unidos: main.o cd.o convert.o exec.o prompt.o
ld -o unidos main.o cd.o convert.o exec.o prompt.o

main.o: main.c header.h
gcc -M -c main.c

cd.o: cd.c header.h extern.h
gcc -M -c cd.c

convert.o: convert.c header.h extern.h
gcc -M -c convert.c

exec.o: exec.c header.h extern.h
gcc -M -c exec.c

prompt.o: prompt.c header.h extern.h
gcc -M -c prompt.c
[/code]
Now before I put that -M in there, it said it couldn't find a lot of functions, like printf and strcat during the linking stage. I read in the gcc man page that the -M is used for passing along this include information to make, but after I put that in there, it doesn't even make any object files. Now I thought that with just the -c option, it would include all the include files in the object file, but that's obviously not the case. So can anyone put this knowledge in my head for me? I'd be quite thankful.

By the way, I know that I can combine all those gcc lines into one line, but right now I'm just worried about making this work.

[kenshi]

Nevermind. One of my friends on Jabber helped me solve this. I just used gcc to link the object files instead of ld. I guess that's simple enough.